The present invention relates to a semiconductor device, and particularly to a technology which is effective when applied to a semiconductor device having a semiconductor chip in which a switching transistor and a current detection transistor are embedded.
A semiconductor chip is mounted over the chip mounting portion of a lead frame, the plurality of leads of the lead frame are coupled to the plurality of electrodes of the semiconductor chip with bonding wires or the like, a sealing resin portion is formed to seal therein the chip mounting portion, the semiconductor chip, the bonding wires, and the inner lead portions of the plurality of leads, the leads are cut from the lead frame, and the outer lead portions of the leads are subjected to bending to manufacture a semiconductor device in the form of a semiconductor package.
Japanese Unexamined Patent Publication No. Hei 10(1998)-326897 (Patent Document 1) describes a technique related to a semiconductor device in which a main cell having a trench gate to allow a main current to flow and a current detection cell having a trench gate to allow a detection current to flow are formed over the same semiconductor substrate.
Japanese Unexamined Patent Publication No. 2008-17620 (Patent Document 2) describes a technique which provides one semiconductor chip with a high-side MOSFET and a sense MOSFET which allows a current corresponding to 1/N of a current flowing in the high-side MOSFET to flow.
Japanese Unexamined Patent Publication No. 2008-60256 (Patent Document 3) describes a technique related to a semiconductor device in which a semiconductor chip having a power transistor and a semiconductor chip having a drive circuit for driving the power transistor are included in one package.